Intel® Scalable System Framework and Intel® Omni-Path Fabric Drive Expanded Use of HPC Systems to More Industries, Workloads
AUSTIN, Texas, Nov. 16, 2015 – Intel Corporation today announced several advancements to its Intel® Scalable System Framework (Intel® SSF) that promise to bring high performance computing (HPC) capabilities and benefits to more industries and new workloads. As a foundational element of the Intel SSF, Intel introduced the Intel® Omni-Path Architecture (Intel® OPA), a new HPC-optimized fabric technology that makes the performance of HPC clusters more accessible to a broader variety of users.
Once reserved only for governments and academia to solve the most complex computational problems, like genome sequencing and climate research, HPC is transforming more industries with new workloads such as big data analytics. More and more, traditional sectors, like healthcare and financial services, are demanding supercomputer-like capabilities to gain real-time insights from increasingly large and complex data sets. As Intel innovations expand HPC capabilities and lower the barriers to adoption, it predicts HPC will become mainstream.
“We’re entering a new era in which supercomputing is being transformed from a tool for a specific problem to a general tool for many,” said Charlie Wuischpard, vice president and general manager of HPC Platform Group at Intel. “System-level innovations in processing, memory, software and fabric technologies are enabling system capabilities to be designed and optimized for different usages, from traditional HPC to the emerging world of big data analytics and everything in between. We believe the Intel Scalable System Framework is the path forward for designing and delivering the next generation of systems for the ‘HPC everywhere’ era.”
Intel SSF is an advanced architectural approach designed to enable more scalable, flexible and balanced HPC systems. Intel SSF will help to simplify the procurement, deployment and management of HPC systems, broadening the accessibility of HPC to more industries and workloads such as data-driven analytics, visualization and machine learning.
The Intel SSF architecture helps run these divergent workloads that stress different parts of the system – compute, memory, I/O – by enabling innovations that optimize the performance of a variety of workloads to be managed in a consistent way. Intel SSF also provides a consistent platform for HPC system deployments in cloud environments.
- Intel will provide Intel SSF reference architectures, designs and validation tools. These technical system specifications will include hardware and software bill of materials for Intel SSF validated systems.
- Colfax*, Cray*, Dell*, Fujitsu Systems Europe*, HPE*, Inspur*, Lenovo*, Penguin Computing*, SGI*, Sugon* and Supermicro* to announce plans to launch systems based on the Intel SSF early next year.
- Introduced Intel OPA, an end-to-end fabric solution that cost-effectively improves the performance of HPC applications for entry level to large-scale HPC clusters.
- Intel OPA’s 48-port switch enables up to 26 percent more servers than InfiniBand* EDR within the same budget1 and up to 60 percent lower power consumption for a more efficient switch and system infrastructure2.
- Intel OPA is currently being used at several large sites, including the Texas Advanced Computing Center and the Pittsburgh Supercomputer Center. Colfax, Cray, Dell, Fujitsu Japan*, Fujitsu Ltd.*, Hitachi*, Huawei*, HPE, Inspur, Lenovo, NEC*, SGI, Sugon, Supermicro and other system vendors starting to announce Intel OPA-based switches and server platforms, with volume shipments ramping in the first quarter of next year.
- Intel announced that preproduction Intel® Xeon Phi™ processors (code-named Knights Landing) are running in several supercomputing-class systems. Cray has a system currently running multiple customer applications in preparation for the supercomputer deployments at Los Alamos (Trinity system) and NERSC (Cori system). Systems are also installed at CEA (the French Alternative Energies and Atomic Energy Commission) by Atos and Sandia National Laboratories by Penguin Computing.Intel expects more than 50 system providers to have Intel Xeon Phi product family-based systems in the market at launch.
- Intel is among more than 30 founding members of the OpenHPC Collaborative Project, a new community-led organization focused on developing a comprehensive and cohesive open source HPC system software stack to drive broader adoption. Intel-supported versions of the open source HPC system software stack are expected to be available next year.
- Intel expands HPC ecosystem support and investments with the creation of five new Intel Parallel Computing Centers focused on Lustre* software development; through a new long-term strategic partnership with the Alan Turing Institute to further the role of high performance computing and data sciences in the U.K.; and with an expanded collaboration with the Barcelona Supercomputing Center, focused on advancing the exascale capabilities of the Intel SSF.
- Intel announced a multiyear, multimillion-dollar program to increase diversity within the HPC ecosystem consisting of a new scholarship program designed to attract women and underrepresented minorities to pursue graduate degrees in computational and data science programs, as well as a new internship program to increase the diversity of Intel’s HPC workforce.
SC15 HPC Matters Plenary
Diane Bryant, senior vice president and general manager of Intel’s Data Center Group, will deliver the opening HPC Matters plenary presentation taking place at SC15 on Monday, Nov. 16, at 5:30 p.m. For more information or to view a replay of the presentation, visit: http://supercomputing_intel.tri-digital.com.
Intel, the Intel logo and Intel Xeon Phi are trademarks of Intel Corporation in the United States and other countries.
Cost reduction scenarios described are intended as examples of how a given Intel- based product, in the specified circumstances and configurations, may affect future costs and provide cost savings. Circumstances will vary. Intel does not guarantee any costs or cost reduction.
Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software or service activation. Performance varies depending on system configuration. No computer system can be absolutely secure. Check with your system manufacturer or retailer or learn more at www.intel.com.
Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more complete information visit www.intel.com/performance.
Optimization Notice: Intel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice Revision #20110804
1 Assumes a 750-node cluster, and number of switch chips required is based on a full bisectional bandwidth (FBB) Fat-Tree configuration. Intel® OPA uses one fully populated 768-port director switch, and Mellanox EDR solution uses a combination of 648-port director switches and 36-port edge switches. Mellanox component pricing from www.kernelsoftware.com, with prices as of Nov. 3, 2015. Compute node pricing based on Dell PowerEdge R730 server from www.dell.com, with prices as of May 26, 2015. Intel® OPA pricing based on estimated reseller pricing based on expected Intel MSRP pricing, to be available on ark.intel.com in November 2015.
2 Assumes 750-node cluster, and number of switch chips required is based on a full bisectional bandwidth (FBB) Fat-Tree configuration. Intel® OPA uses one fully populated 768-port director switch, and Mellanox EDR solution uses a combination of director switches and edge switches. Mellanox power data based on Mellanox CS7500 Director Switch, Mellanox SB7700/SB7790 Edge switch, and Mellanox ConnectX-4 VPI adapter card installation documentation posted on www.mellanox.com as of Nov. 1, 2015. Intel OPA power data based on product briefs posted on www.intel.com as of Nov. 16, 2015. Intel® OPA pricing based on estimated reseller pricing based on expected Intel MSRP pricing, to be available on ark.intel.com in November 2015.