Intel Official News and Information

Intel FPGA Technology Supports NEC in Face Recognition Technology

nec-2x1Intel technology is powering a face recognition engine that can rapidly and accurately identify people – even when they are moving and in a crowd – to help detect and prevent possible incidents at critical facilities and public venues. NEC* relies on Intel® Arria® 10 field programmable gate arrays (FPGAs) operating on Intel® Xeon® processor–based servers to increase the performance of its NEC NeoFace* facial recognition engine to a level where an individual can be identified smoothly from a high-resolution image with dozens of faces.

“Facial recognition in a moving crowd requires highly advanced techniques when compared to still images because these cameras are affected by many factors: camera location, image quality and lighting, along with the subject’s size, walking speed and face direction,” said Tadashige Kadoi, general manager of IoT Platform Development Division at NEC Corporation. “Intel FPGAs and their parallel processing capability help NEC to enable fast and accurate collection and processing of images from even 4K high-resolution remote cameras.”

To create the NeoFace Accelerator, NEC’s NeoFace facial recognition engine software IP is integrated into an Intel Arria 10 FPGA, keeping the same accuracy level while achieving higher performance in facial recognition than the previous solution.

Intel teams also worked with NEC to enhance the performance of NeoFace data center server technology. NEC NeoFace Accelerator includes not only the Intel Arria 10 FPGA, but also an Intel® MAX® 10 low-cost FPGA and Intel® Enpirion® power devices.

Intel technology configuration used by NEC:

  • NEC-branded card with FPGA, and Intel Enpirion power
  • Intel® Xeon® processor Xeon E5-2697v4
  • Intel® Arria® 10 FPGA (for the face detection engine)
  • Intel® MAX® 10 FPGA (for configuration, field upgrade, power monitor/control)
  • Intel® Enpirion® EM2130 (to power Arria 10 core)
  • Intel® Enpirion® EN2342 (to power the IO and transceivers)

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