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At Architecture Day 2020, Intel Chief Architect Raja Koduri, Intel fellows and architects provided details on the progress Intel is making on its six pillars of technology innovation: process and packaging, architecture, memory, interconnects, security and software. Intel is taking full advantage of its unique position to deliver a mix of scalar, vector, matrix and spatial architectures deployed in CPUs, GPUs, accelerators and FPGAs – unified by oneAPI, an industry-standard open programming model to simplify application development.

Intel revealed its 10nm SuperFin technology, representing the largest single intranode enhancement in the company’s history and delivering performance improvement comparable to a full-node transition. Intel also unveiled architectural details of its Willow Cove microarchitecture and the Tiger Lake system-on-chip architecture for mobile client and provided first looks at its fully scalable Xe graphics architectures. Together with Intel’s disaggregated design approach and coupled with advanced packaging technology, XPU offerings and software-centric strategy, the company is focused on developing leading products across its portfolio to customers.

Raja Koduri Editorial: Intel Delivers Advances Across 6 Pillars of Technology, Powering Our Leadership Product Roadmap

Event Fact Sheet: Intel Unpacks Architectural Innovations and Reveals New Transistor Technology

Presentation: Intel Architecture Day 2020 Presentation Slides

More Resources: Six Pillars of Technology Innovation for the Next Era of Computing

Event Video Replay

View the entire video above or click on a specific topic area below to go to that section of the video replay.

Topics:

» 6 Technology Pillars Overview, Process and Packaging Update
» Tiger Lake, Willow Cove, CPU Roadmap
» GPU Roadmap, Xe LP Architecture and Software
» FPGAs, Memory, Interconnect
» Security, AI Software, oneAPI
» Data center, Client, Intel Labs

Images

  • 10nm SuperFin technology combines Intel’s enhanced FinFET transi
  • 10nm SuperFin technology combines Intel’s enhanced FinFET transi
  • 10nm SuperFin technology combines Intel’s enhanced FinFET transi
  • 10nm SuperFin technology delivers a process performance boost th
  • 10nm SuperFin technology combines an enhanced FinFET transistor,
  • The Tiger Lake mobile client architecture, built using Intel 10n
  • The Tiger Lake mobile client architecture, built using Intel 10n
  • Intel’s advanced packaging roadmap is built on decades of resear
  • Intel’s CPU core roadmap now includes a new Alder Lake performan
  • The Willow Cove CPU core builds on the Sunny Cove foundation and
  • The Willow Cove CPU core in Tiger Lake is faster and more effici
  • Xe-LP is Intel’s most efficient architecture for PC and mobile
  • Xe-HP is the industry’s first multitiled, highly scalable, hig
  • Intel’s GPU strategy is rooted in Xe, a single architecture that
  • Designed with software first, scalability next and optimized for
  • Intel provides memory and storage options ranging from microseco
  • Looking ahead to its Gold release of oneAPI, Intel will provide
  • Intel’s vision for the future of security will protect the compu
  • Intel Chief Architect Raja Koduri holds up Intel’s Xe-HP single-
  • During Intel Architecture Day, Chief Architect Raja Koduri intro
  • During Intel Architecture Day 2020, Chief Architect Raja Koduri

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Tiger Lake Explainer

SuperFin Technology Explainer